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Selecting a PA for LEO Ground Terminal: Five Specs That Actually Matter

Gain flatness, P1dB compression, and thermal resistance are not interchangeable tradeoffs. A guide for hardware teams evaluating RF front-ends for LEO VSAT terminals.

Selecting a PA for LEO Ground Terminal: Five Specs That Actually Matter

Hardware teams evaluating RF front-ends for LEO VSAT ground terminals often start with output power and frequency. Those two parameters are necessary, but they do not determine whether a PA will close the system budget under field conditions. Five other specifications drive that decision, and they interact in ways that make independent optimization misleading.

This article works through each of those five specs: gain flatness, P1dB compression, thermal resistance, OIP3, and package-to-board interface. The goal is to give hardware evaluators a framework for comparing PA candidates that goes beyond the peak headline specs on the product page.

Spec 1: Gain Flatness Across the Allocation

LEO constellations in Ku-band operate across Ka-band uplink allocations (27.5-30 GHz) or Ku-band (14-14.5 GHz), depending on the constellation design. The PA must maintain acceptable gain flatness across the entire allocated channel bandwidth, including adjacent channels that may be active simultaneously in a frequency-division scheme.

The system consequence of gain flatness degradation is EVM distortion at the edge subcarriers of the OFDM waveform and spectral regrowth that creates out-of-band interference into adjacent channel allocations. Gain variation of +/- 0.5 dB across a 500 MHz instantaneous bandwidth is generally acceptable for QPSK and 8PSK. For 16APSK and 32APSK, tighter flatness is required because the constellation is more sensitive to amplitude variation across the band.

The evaluation question is not just whether gain flatness meets the spec at room temperature. It is whether it meets the spec over the operating temperature range and after the device has been running continuously for a thermal soak period. GaN devices show 0.1-0.3 dB of gain variation across a 40-degree temperature swing, which is better than GaAs in most designs. That behavior over temperature is worth measuring explicitly rather than assuming from the room-temperature data.

Spec 2: P1dB and How to Interpret the Operating Margin

The 1 dB gain compression point (P1dB) marks where the PA output has fallen 1 dB below the extrapolated linear gain line. Operating at P1dB means the device is already in moderate compression; most system designs target 3-6 dB of output back-off from P1dB to maintain modulation quality.

The practical question is what output back-off is required by the modulation scheme. For a DVB-S2X terminal running 32APSK, the system budget typically requires 4-5 dB back-off from P1dB. For a QPSK burst terminal, 2-3 dB may be sufficient. If a datasheet lists P1dB without a recommended back-off for the supported modulations, or without PAE at the back-off operating point, it is leaving out information that matters for system design.

One evaluation step that is often skipped is measuring P1dB under worst-case supply voltage. Supply regulation in an outdoor terminal unit is finite, and supply variation of +/- 5% shifts P1dB by 0.3-0.8 dB depending on the device topology. If your link budget is tight, that shift matters.

Spec 3: Thermal Resistance, and Why Datasheets Understate It

Junction-to-case thermal resistance (Theta_jc) is the spec that most directly limits sustained output power in a deployed terminal. The relationship is straightforward: T_junction = T_case + P_diss * Theta_jc. As junction temperature rises, gain decreases and the reliability models predict shorter device lifetime.

The issue with datasheet Theta_jc values is that they are typically measured in a controlled lab setup with a precisely prepared interface between the package flange and the measurement cold plate. Field installations use a thermal interface material (TIM) between the PA module and the housing. Typical TIM thermal resistance adds 0.3-1.0 degrees C/W to the measured Theta_jc, depending on the TIM compound and the applied pressure. A PA specified at Theta_jc = 3 degrees C/W may see effective junction-to-mounting-surface resistance of 3.8-4.2 degrees C/W in production.

This distinction is not a knock against GaAs or GaN specifically. It is a measurement methodology issue that applies to both. The evaluation recommendation is to ask the PA vendor for Theta_jc measured with a production-representative TIM, or to plan for the TIM adder explicitly in your thermal model.

Spec 4: OIP3 and the Intermodulation Floor

Third-order output intercept point (OIP3) determines the intermodulation distortion (IMD) floor in a multi-carrier or wideband signal scenario. For LEO terminals that must simultaneously receive traffic and transmit on adjacent allocations, or for multi-beam terminals supporting concurrent uplink channels, OIP3 directly sets the limit on co-channel interference into the adjacent beam's receive path.

The standard OIP3 measurement uses two-tone CW. The two-tone result is an approximation of wideband IMD performance; it is close enough for most system budgets but is slightly optimistic for a broadband OFDM signal where the intermodulation products are distributed across the full band rather than concentrated at predictable tone offsets. For high-data-rate HTS uplinks, a wideband noise loading measurement provides a more accurate picture of the IMD floor under operational conditions.

A GaN-on-SiC PA operating at the same back-off from P1dB as a GaAs PA typically shows 2-5 dB higher OIP3, depending on the bias conditions and device geometry. This advantage comes from the higher supply voltage and the device's more linear AM-AM curve in the region between 4 dB back-off and P1dB. The higher OIP3 means you can operate at closer to P1dB before the IMD products become problematic, which directly translates to a smaller power margin requirement in the link budget.

Spec 5: Package-to-Board Interface and Assembly Yield

The fifth spec is the one that hardware teams most often treat as a procurement detail rather than an engineering constraint. The package type, flange material, and land pattern determine three things that directly affect program risk: RF parasitics at frequency, thermal contact quality under compression, and board-level assembly yield.

At Ku and Ka-band, package parasitic inductance in the lead or via structure creates a high-frequency rolloff that limits usable bandwidth even if the die itself is capable. A QFN package with 0.3 nH lead inductance adds less than 0.2 dB insertion loss at 14 GHz but can add 0.8-1.2 dB at 28 GHz. That incremental loss comes directly out of the link budget.

Bare-die or flip-chip attachment gives the lowest parasitics but requires a controlled substrate environment (typically LTCC or Rogers material) and limits rework if a die fails during prototyping. Laminate BGA packages reduce assembly complexity but add thermal resistance through the laminate substrate layer. The right choice depends on your volume, your substrate capability, and how important rework flexibility is during the development phase.

How These Five Specs Interact

The five specs do not optimize independently. Higher OIP3 often comes at the cost of lower efficiency because higher bias current improves linearity but increases P_DC. Lower Theta_jc requires better package thermal design, which may increase lead parasitics if it is achieved through a larger flange footprint. Wider gain flatness may require external matching network complexity that increases insertion loss and board area.

The practical evaluation approach is to define your system budget first: what is the required output power at the antenna port under worst-case link conditions, what modulation order must be supported, and what is the thermal environment at the PA mounting surface. Then map each of those system requirements to the PA specs that bound them. P1dB and OIP3 bound the modulation quality. Theta_jc bounds the sustained output power. Gain flatness bounds the EVM across the channel. Package parasitics bound the usable bandwidth.

Once the system requirements are mapped, the tradeoffs between efficiency and linearity or between thermal resistance and assembly complexity can be evaluated in the context of what actually constrains your design, not in isolation. That mapping is where hardware evaluation time is most productively spent.